Job

DESIGN TECHNOLOGY CO-OPTIMIZATION (DTCO) DESIGN ENGINEER

Job Description

Sony Depthsensing Solutions is looking for an DTCO Design Engineer to work on next generations of Time of Flight (TOF) sensor designs and architectures in their Brussels location.

This position is part of an advanced technology team which is evaluating the impact of new IC processes and technologies (pixel architecture, material, 3D IC,..) on depth sensing sensor's FoM.

As a DTCO Design Engineer, you will bring your deep knowledge and proven experience in analog design of complex analog blocks and full chips to identify design opportunity for our future generations of ICs.

You will analyze how future IC technologies (3D stacking, embedded memory, ..) will impact current sensor architecture, and propose new architectures to maximize the benefit of innovative Si manufacturing. 

You will be interacting with local and remote design teams and other R&D unit, making the link between technology development and ToF imager SoC's.

Responsibilities

  • You will work on R&D TOF sensors, circuits, and pixels.
  • You will  interact with different SONY R&D departments and evaluate the impact of processing innovation on future depth sensing imagers. 
  • You will work with other members of the design team on the analysis, design, verification and evaluation of TOF sensors.

Qualifications

  • You have a masters degree in electrical engineering or similar by experience (PhD is an asset)
  • You have a good understanding of Silicon based process technologies, and  their impacts at device and circuit level
  • You ideally have 3-5 years of experience with the design of complex analog blocks such as ADC, DAC, PLL, bias generator, gain amplifiers, and comparators. Knowledge of image sensor functions a plus.
  • You have some experience with the full design flow including Cadence layout from early schematics, area estimation, full layout, parasitic extraction, ECO implementation
  • You have some experience with power analysis, IR drop measurement, power planning, top level layout of full chips
  • You are goal oriented and innovative approach to problem solving.
  • You are willing to travel internationally if needed
  • You are fluent in English.
apply now PRINT